1. Technical Field
This invention relates generally to the field of semiconductors and, more particularly, to approaches for applying a self-forming barrier layer along bottom surfaces of vias, trenches, or the like.
2. Related Art
The semiconductor integrated circuit (IC) industry has experienced rapid growth in recent years. Specifically, generations of ICs have been produced whereby each generation has smaller and more complex circuits than the previous generation. However, for these advances to be realized, developments in IC processing and manufacturing are needed. Under this course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component that can be created using a fabrication process) has decreased.
Semiconductor devices are typically formed using multiple layers of material, including conductive, semi-conductive, dielectric, and insulative layers. To provide electrical conductivity between layers in a semiconductor device, a hole or via may be formed through certain layers. The via is then lined with a barrier layer, such as Ti, TiN, or Ti/TiN, and filled with an electrically conductive material, such as a metal, to provide electrical conductivity between the layers.
Under previous approaches, multiple surfaces of a via were lined with the barrier layer, and the device was then subject to high temperatures. Unfortunately, barrier layers positioned along a bottom surface of the via often diffuse into the metal layer of the device positioned below the via. Such diffusion has adverse impacts on the reliability of the device.